Wafer-level electrical testing of semiconductor products plays an important role in the semiconductor industry. Identifying defective circuit components, e.g., transistors, at the wafer level before packaging promotes cost reduction. One parameter that is tested is the threshold voltage of a metal oxide semiconductor (MOS) transistor. In the case of an NMOS transistor, the threshold voltage corresponds to the minimum voltage at a gate terminal of the transistor that allows current to flow from a source terminal to a drain terminal, i.e., the voltage at which the NMOS transistor turns on. For a PMOS transistor, the threshold voltage corresponds to the maximum gate voltage at which the transistor is turned on.
Known techniques for determining the threshold voltage of a transistor include binary search and interpolation. The binary search technique involves adjusting the gate voltage and measuring the drain current, in an iterative manner similar to a binary search for data in a sorted array. A monotone relationship, direct relationship between the gate voltage and the drain current is assumed. As an example, the gate voltage may be set (forced) to a first value, and the drain current is then measured. If the drain current exceeds a predetermined threshold current, the gate voltage is reduced to a second value and the drain current is measured again. If the drain current is now less than the threshold current, the drain current is then increased, and the search continues in this manner until a terminating condition is met, e.g., until the drain current is within a predetermined distance from the predetermined threshold current. The binary search technique is relatively slow, requiring several force/measure cycles.
The interpolation technique also exploits the monotone, direct relationship between the gate voltage and the drain current. Suppose two force/measure cycles are performed to obtain two data points (VG1, ID1) and (VG2, ID2), where VG stands for gate voltage, ID stands for drain current, ID1 is greater than the threshold current, and ID2 is less than the threshold current. Interpolation (e.g., linear interpolation, if linearity is assumed) is then performed to determine a gate voltage that approximately corresponds to the threshold current.